US Patent 7094681 Semiconductor device fabrication method
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Patent Inventor Names
Hideshi Miyajima0
Keiji Fujita0
Rempei Nakata0
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Article (+540 characters)
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Patent abstract
Disclosed is a semiconductor device comprising a semiconductor substrate, a porous insulating film formed above the semiconductor substrate, the porous insulating film having a relative dielectric constant of 2.5 or less and including a first insulating material, at least a portion of pores in the porous insulating film having on the inner wall thereof a layer of a second insulating material which differs in nature from the first insulating material, and a plug and/or a wiring layer buried in the porous insulating film.
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US Patent 07094681 Semiconductor device fabrication method US Patent 7094681 Semiconductor device fabrication method
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Patent Number
070946810
Patent Number
70946810
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Official Website
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Patent Jurisdiction
Patent Number
070946810
Date of Patent
August 22, 2006
0Patent Application Number
107014760
Date Filed
November 6, 2003
0Official Website
Patent Primary Examiner
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US Patent 07094681 Semiconductor device fabrication method
Infobox
Is a
Patent jurisdiction
Patent number
07094681
Date of patent
August 22, 2006
Patent application number
10701476
Date Filed
November 6, 2003
Patent primary examiner
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