List of P.A. Semi patents

Patents where

Current Assignee

Name

‌

P.A. Semi

Name	Description	Current Assignee	Patent Jurisdiction	Patent Number	Date of Patent
‌ US Patent 7398361 Combined buffer for snoop, store merging, load miss, and writeback operations	Patent 7398361 was granted and assigned to P.A. Semi on July, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7398361	July 8, 2008
‌ US Patent 7411409 Digital leakage detector that detects transistor leakage current in an integrated circuit	Patent 7411409 was granted and assigned to P.A. Semi on August, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7411409	August 12, 2008
‌ US Patent 7373569 Pulsed flop with scan circuitry	Patent 7373569 was granted and assigned to P.A. Semi on May, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7373569	May 13, 2008
‌ US Patent 7426601 Segmented interconnect for connecting multiple agents in a system	Patent 7426601 was granted and assigned to P.A. Semi on September, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7426601	September 16, 2008
‌ US Patent 7269682 Segmented interconnect for connecting multiple agents in a system	Patent 7269682 was granted and assigned to P.A. Semi on September, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7269682	September 11, 2007
‌ US Patent 7372323 Resonance limiter circuits for an integrated circuit	Patent 7372323 was granted and assigned to P.A. Semi on May, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7372323	May 13, 2008
‌ US Patent 7376817 Partial load/store forward prediction	Patent 7376817 was granted and assigned to P.A. Semi on May, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7376817	May 20, 2008
‌ US Patent 7245150 Combined multiplex or/flop	Patent 7245150 was granted and assigned to P.A. Semi on July, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7245150	July 17, 2007
‌ US Patent 7496695 Unified DMA	Patent 7496695 was granted and assigned to P.A. Semi on February, 2009 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7496695	February 24, 2009
‌ US Patent 7461190 Non-blocking address switch with shallow per agent queues	Patent 7461190 was granted and assigned to P.A. Semi on December, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7461190	December 2, 2008
‌ US Patent 7454674 Digital jitter detector	Patent 7454674 was granted and assigned to P.A. Semi on November, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7454674	November 18, 2008
‌ US Patent 7218562 Recovering bit lines in a memory array after stopped clock operation	Patent 7218562 was granted and assigned to P.A. Semi on May, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7218562	May 15, 2007
‌ US Patent 7277353 Register file	Patent 7277353 was granted and assigned to P.A. Semi on October, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7277353	October 2, 2007
‌ US Patent 7187606 Read port circuit for register file	Patent 7187606 was granted and assigned to P.A. Semi on March, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7187606	March 6, 2007
‌ US Patent 7355905 Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage	Patent 7355905 was granted and assigned to P.A. Semi on April, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7355905	April 8, 2008
‌ US Patent 7474571 Integrated circuit with separate supply voltage for memory that is different from logic circuit supply voltage	Patent 7474571 was granted and assigned to P.A. Semi on January, 2009 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7474571	January 6, 2009
‌ US Patent 7319344 Pulsed flop with embedded logic	Patent 7319344 was granted and assigned to P.A. Semi on January, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7319344	January 15, 2008
‌ US Patent 7493451 Prefetch unit	Patent 7493451 was granted and assigned to P.A. Semi on February, 2009 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7493451	February 17, 2009
‌ US Patent 7472260 Early retirement of store operation past exception reporting pipeline stage in strongly ordered processor with load/store queue entry retained until completion	Patent 7472260 was granted and assigned to P.A. Semi on December, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7472260	December 30, 2008
‌ US Patent 7268633 Voltage-controlled oscillator for low-voltage, wide frequency range operation	Patent 7268633 was granted and assigned to P.A. Semi on September, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7268633	September 11, 2007
‌ US Patent 7500044 Digital phase relationship lock loop	Patent 7500044 was granted and assigned to P.A. Semi on March, 2009 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7500044	March 3, 2009
‌ US Patent 7529866 Retry mechanism in cache coherent communication among agents	Patent 7529866 was granted and assigned to P.A. Semi on May, 2009 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7529866	May 5, 2009
‌ US Patent 7412555 Ordering rule and fairness implementation	Patent 7412555 was granted and assigned to P.A. Semi on August, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7412555	August 12, 2008
‌ US Patent 7373486 Partially decoded register renamer	Patent 7373486 was granted and assigned to P.A. Semi on May, 2008 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7373486	May 13, 2008
‌ US Patent 7276925 Operating an integrated circuit at a minimum supply voltage	Patent 7276925 was granted and assigned to P.A. Semi on October, 2007 by the United States Patent and Trademark Office.	‌ P.A. Semi	United States Patent and Trademark Office	7276925	October 2, 2007

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