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Ji H Bae
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Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 14 Dec, 2021
Edits made to:
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properties)
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Patent primary examiner of
US Patent 11175712 Controlling operating voltage of a processor
US Patent 11188139 Storage system, method of controlling same, information processing apparatus, and storage medium
US Patent 7577858 Method for reducing power consumption in a state retaining circuit, state retaining circuit and electronic device
US Patent 7613937 Method and apparatus for utilizing a microcontroller to provide an automatic order and timing power and reset sequencer
US Patent 7617409 System for checking clock-signal correspondence
US Patent 7636861 Bus technique for controlling power states of blades in a blade enclosure
US Patent 7647516 Power consumption management among compute nodes
US Patent 7657774 Low power memory controller with leaded double data rate DRAM package on a two layer printed circuit board
US Patent 7660976 Reduced read time in electronic apparatus and media control method in electronic apparatus
US Patent 7661003 Systems and methods for maintaining performance of an integrated circuit within a working power limit
US Patent 7664944 Booting from a compressed image
US Patent 7664972 System and method for controlling power delivered to a powered device based on cable characteristics
US Patent 7664978 Memory interface circuitry with phase detection
US Patent 7669043 Memory parameter initialization based on a temperature acquired at startup
US Patent 7669062 Image processing apparatus with distributed processing and shutdown control method
US Patent 7669063 Method of power down control for a display device, and power down controller for implementing the method
US Patent 7669068 Circuit, system and method for selectively turning off internal clock drivers
US Patent 7673161 Apparatus, system, and method for selecting a waking process
US Patent 7676684 Semiconductor device and signal processing method for synchronizing data with a data strobe signal
US Patent 7681026 System and method for reducing instability in an information handling system
US Patent 7681056 Dynamic power management in a processor design
US Patent 7685439 Method for effecting the controlled shutdown of data processing units
US Patent 7685442 Method and systems for a radiation tolerant bus interface circuit
US Patent 7698575 Managing power consumption by requesting an adjustment to an operating point of a processor
US Patent 7707435 Method and system for safe and efficient chip power down drawing minimal current when a device is not enabled
US Patent 7721078 Method and system to dynamically boot to a non-visible partition
US Patent 7725749 Information processing device for assigning processes to a main CPU or sub-CPU based on a sleeping state
US Patent 7747848 Updating the system management information of a computer system
US Patent 7747878 System and method for reduction of information handling system power state transition of audible noise
US Patent 7752471 Adaptive USB mass storage devices that reduce power consumption
US Patent 7761721 System of integrated environmentally hardened architecture for space application
US Patent 7765394 System and method for restoring a master boot record in association with accessing a hidden partition
US Patent 7765414 Circuit and operating method for integrated interface of PDA and wireless communication system
US Patent 7769990 Using a monitoring process to update system configuration settings during restore operations
US Patent 7770039 Primary side control circuit and method for ultra-low idle power operation
US Patent 7770051 Strategy to verify asynchronous links across chips
US Patent 7774630 Method, computing system, and computer program for reducing power consumption of a computing system by relocating jobs and deactivating idle servers
US Patent 7779277 Power control for a plurality of internal power supply circuits of a semiconductor integrated circuit
US Patent 7779278 Primary side control circuit and method for ultra-low idle power operation
US Patent 7779284 Techniques for operating a processor subsystem to service masked interrupts during a power-down sequence
US Patent 7783909 Method, computing system, and computer program for reducing power consumption of a computing system by relocating jobs and deactivating idle servers
US Patent 7797555 Method and apparatus for managing power from a sequestered partition of a processing system
US Patent 7802117 Automated power management for electronic devices
US Patent 7814352 Selective connection of a memory to either a gateway card or information processor based on the power mode
US Patent 7814356 Apparatus and control method for initializing a phase adjusting part in response to a power supply cut signal
US Patent 7818593 Power conversation for devices on a shared bus using bus busy and free signals
US Patent 7822956 Low power digital audio decoding/playing system for computing devices
US Patent 7823002 Digital reliability monitor having autonomic repair and notification capability
US Patent 7836324 Oversampling-based scheme for synchronous interface communication
US Patent 7840823 Processor system for varying clock frequency and voltage in response to a comparison of instruction execution rate to a reference value
US Patent 7844811 Using chip select to specify boot memory
US Patent 7853813 Anticipatory power management for battery-powered electronic device
US Patent 7853814 Method and system for executing a power-cutoff-specific process within a specific processor of a multiprocessor system
US Patent 7856567 Electronic device with serial ATA interface and power saving method for serial ATA buses
US Patent 7865748 Operating mode for extreme power savings when no network presence is detected
US Patent 7882369 Processor performance adjustment system and method
US Patent 7882372 Method and system for controlling and monitoring an array of point-of-load regulators
US Patent 7882376 Power control for a core circuit area of a semiconductor integrated circuit device
US Patent 7882383 System on a chip with RTC power supply
US Patent 7886164 Processor temperature adjustment system and method
US Patent 7890741 Low power digital audio decoding/playing system for computing devices
US Patent 7890782 Dynamic power management in an execution unit using pipeline wave flow control
US Patent 7904737 Remote control save and sleep override
US Patent 7913099 Dynamic processor operating voltage control in response to a change in a core/bus clock frequency ratio
US Patent 7917741 Enhancing security of a system via access by an embedded controller to a secure storage device
US Patent 7917788 SOC with low power and performance modes
US Patent 7917799 Method and system for digital frequency clocking in processor cores
US Patent 7921320 Single wire serial interface
US Patent 7925904 Circuit and operating method for integrated interface of PDA and wireless communication system
US Patent 7945804 Methods and systems for digitally controlled multi-frequency clocking of multi-core processors
US Patent 7953992 System in package semiconductor device suitable for efficient power management and method of managing power of the same
US Patent 7958344 Method for adjusting set-up default value of bios and mainboard using the same method
US Patent 7958379 Substrate bias switching unit for a low power processor
US Patent 7984283 System and method for secure operating system boot
US Patent 7987382 Method and apparatus for minimizing the influence of a digital sub-circuit on at least partially digital circuits
US Patent 7996688 Ultrasound system power management
US Patent 7996700 Media data synchronization in a wireless network
US Patent 7996704 Asynchronous first in first out interface and operation method thereof
US Patent 8001366 Method for reducing booting time of mobile communication terminal
US Patent 8001409 Synchronization device and methods thereof
US Patent 8006114 Software programmable timing architecture
Edits on 8 Dec, 2021
Golden AI
edited on 8 Dec, 2021
Edits made to:
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properties)
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Patent primary examiner of
US Patent 8006114 Software programmable timing architecture
Golden AI
edited on 8 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 8001366 Method for reducing booting time of mobile communication terminal
Golden AI
edited on 8 Dec, 2021
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+1
properties)
Infobox
Patent primary examiner of
US Patent 8001409 Synchronization device and methods thereof
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7996704 Asynchronous first in first out interface and operation method thereof
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7996700 Media data synchronization in a wireless network
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7996688 Ultrasound system power management
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7987382 Method and apparatus for minimizing the influence of a digital sub-circuit on at least partially digital circuits
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7984283 System and method for secure operating system boot
Golden AI
edited on 7 Dec, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7958379 Substrate bias switching unit for a low power processor
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7958344 Method for adjusting set-up default value of bios and mainboard using the same method
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7953992 System in package semiconductor device suitable for efficient power management and method of managing power of the same
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7945804 Methods and systems for digitally controlled multi-frequency clocking of multi-core processors
Edits on 7 Dec, 2021
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7925904 Circuit and operating method for integrated interface of PDA and wireless communication system
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7921320 Single wire serial interface
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7917788 SOC with low power and performance modes
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7917799 Method and system for digital frequency clocking in processor cores
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7917741 Enhancing security of a system via access by an embedded controller to a secure storage device
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7913099 Dynamic processor operating voltage control in response to a change in a core/bus clock frequency ratio
Golden AI
edited on 7 Dec, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7904737 Remote control save and sleep override
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