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Rehana Perveen

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Megan Gustafson
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Golden AI
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Kangaroo (GAR)
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Golden AI
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Kangaroo (GAR)
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Megan Gustafson
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Patent primary examiner of
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US Patent 11170134 Multi-user cloud parametric feature-based 3D CAD system with sketching
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US Patent 7089338 Method and apparatus for interrupt signaling in a communication network
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US Patent 7089339 Sharing of functions between an embedded controller and a host processor
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US Patent 7089341 Method and apparatus for supporting interrupt devices configured for a particular architecture on a different platform
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US Patent 7089343 System for transmitting data between two bus systems
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US Patent 7093041 Dual purpose PCI-X DDR configurable terminator/driver
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US Patent 7093043 Data array having redundancy messaging between array controllers over the host bus
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US Patent 7093044 Method and apparatus for providing quality-of-service delivery facilities over a bus
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US Patent 7093045 Method and apparatus for bus arbitration capable of effectively altering a priority order
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US Patent 7093051 Dynamic input/output: configurable data bus for optimizing data throughput
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US Patent 7093053 Console chip and single memory bus system
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US Patent 7093058 Single request data transfer regardless of size and alignment
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US Patent 7096288 Architecture of reconfigurable radio processor
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US Patent 7096290 On-chip high speed data interface
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US Patent 7096291 Method and device for arbitrating bus grant
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US Patent 7096306 Distributed system with cross-connect interconnect transaction aliasing
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US Patent 7096307 Shared write buffer in a peripheral interface and method of operating
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US Patent 7096308 LPC transaction bridging across a PCI
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US Patent 7096310 Switch configurable for a plurality of communication protocols
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US Patent 7099966 Point-to-point electrical loading for a multi-drop bus
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US Patent 7099978 Method and system of completing pending I/O device reads in a multiple-processor computer system
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US Patent 7099980 Data storage system having port disable mechanism
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US Patent 7103686 Method and apparatus for device discovery
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US Patent 7103687 System and method for providing an image file in a computer system
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US Patent 7103689 Method for automatic replacement in automation technology field devices where swapping is not necessary
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US Patent 7103692 Method and apparatus for an I/O controller to alert an external system management controller
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US Patent 7103695 System and method for scaling a bus based on a location of a device on the bus
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US Patent 7103698 Docking alignment sensor
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US Patent 7103765 Method and system for providing a modulized server on board
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US Patent 7107374 Method for bus mastering for devices resident in configurable system logic
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US Patent 7107376 Systems and methods for bandwidth shaping
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US Patent 7107378 Cooperative interconnection and operation of a non-volatile memory card and an input-output card
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US Patent 7107381 Flexible data transfer to and from external device of system-on-chip
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US Patent 7107384 Dynamic PCI-bus pre-fetch with separate counters for commands of commands of different data-transfer lengths
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US Patent 7111097 One wire serial communication protocol method and circuit
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US Patent 7111100 Systems and methods for assigning an address to a network device added to an existing network
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US Patent 7111101 Method and system for port numbering in an interconnect device
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US Patent 7111102 Port adapter for high-bandwidth bus
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US Patent 7114013 Intelligent data storage manager
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US Patent 7114020 Software mechanism for unique identification of SCSI device
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US Patent 7117280 Network based intra-system communications architecture
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US Patent 7117281 Circuit, system, and method for data transfer control for enhancing data bus utilization
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US Patent 7117282 Method and apparatus for active isolation of communications ports
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US Patent 7117288 USB dynamic service switch for dual processor architecture
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US Patent 7120711 System and method for communicating over intra-hierarchy and inter-hierarchy links
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US Patent 7120712 Communications system and method with multilevel connection identification
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US Patent 7120713 Systems and methods for interfacing legacy equipment to high-speed data buses
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US Patent 7120716 Semiconductor integrated circuit and interrupt request output method thereof
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US Patent 7120717 Method and apparatus for controlling interrupt storms
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US Patent 7120720 Microcomputer bridge for remote manageability
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US Patent 7120722 Using information provided through tag space
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US Patent 7120724 USB interface extension through split transaction protocol
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US Patent 7120788 Method and system for shutting down and restarting a computer system
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US Patent 7124220 Sequencer device with automated active port detection and sequencing
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US Patent 7124223 Routability for memory devices
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US Patent 7124234 Managing transmissions between devices
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US Patent 7127003 Method and apparatus for communicating information using different signaling types
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US Patent 7127538 Single-pin serial communication link with start-bit flow control
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US Patent 7127539 Statistic method for arbitration
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US Patent 7127540 Apparatus and method for controlling frequency of bus use
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US Patent 7127541 Automatically establishing a wireless connection between adapters
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US Patent 7127543 Access control apparatus and access control method
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US Patent 7127544 Data transfer apparatus and data transfer method
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US Patent 7130943 Data processing system with bus access retraction
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US Patent 7130945 Controlling method for transmitting reserve commands from a controller to target devices
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US Patent 7130947 Method of arbitration which allows requestors from multiple frequency domains
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US Patent 7130949 Managing input/output interruptions in non-dedicated interruption hardware environments
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US Patent 7130950 Providing access to memory configuration information in a computer
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US Patent 7130953 Bus architecture techniques employing busses with different complexities
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US Patent 7130954 Data migration method, protocol converter and switching apparatus using it
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US Patent 7133944 Media access controller with power-save mode
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US Patent 7133945 Scalable I/O signaling topology using source-calibrated reference voltages
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US Patent 7133947 Data communication system, data communication method, and communication unit
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US Patent 7133948 Controller device and communications system for transmitting reserve commands from a controller to target devices
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US Patent 7133951 Alternate set of registers to service critical interrupts and operating system traps
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US Patent 7133953 Data transmission device used to forward data received at a first device for a second device to the second device
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US Patent 7133956 Electronic device with serial ATA interface and signal amplitude adjusting method
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US Patent 7133957 Method and an apparatus for a re-configurable processor
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US Patent 7133958 Multiple personality I/O bus
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US Patent 11175708 Thermal simulation for management controller development projects
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US Patent 7136904 Wireless cable replacement for computer peripherals using a master adapter
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US Patent 7136953 Apparatus, system, and method for bus link width optimization
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US Patent 7136955 Expansion adapter supporting both PCI and AGP device functions
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US Patent 7136958 Multiple processor system and method including multiple memory hub modules
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US Patent 7139861 Input/output unit access switching system and method
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US Patent 7143218 Network media access controller embedded in a programmable logic device-address filter
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US Patent 7143222 Adaptive message delivery system
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US Patent 7143223 Method, system and program product for emulating an interrupt architecture within a data processing system
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US Patent 7143225 Apparatus and method for viewing data processor bus transactions on address pins during memory idle cycles
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US Patent 7143227 Broadcast bridge apparatus for transferring data to redundant memory subsystems in a storage controller
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US Patent 7146443 Instruction encoding method for single wire serial communications
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US Patent 7146448 Apparatus and method for adopting an orphan I/O port in a redundant storage controller
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US Patent 7146449 Bluetooth association with simple power connection
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US Patent 7149827 Methods and apparatus for tristate line sharing
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US Patent 7149828 Bus arbitration apparatus and bus arbitration method
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US Patent 7149836 GPRS replaceable module communication device
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US Patent 7149838 Method and apparatus for configuring multiple segment wired-AND bus systems
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US Patent 7152126 Stacked 3U payload module unit
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US Patent 7152127 Multi-purpose peripheral interface for computing systems
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US Patent 7152132 Method and apparatus for improving buffer utilization in communication networks
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US Patent 7152133 Expanded functionality protocol adapter for in-vehicle networks
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US Patent 7152136 Implementation of PCI express
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US Patent 7152137 Method for exchanging data between a plurality of subscribers by means of a data bus
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US Patent 7155551 Hardware semaphore intended for a multi-processor system
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US Patent 7155553 PCI express to PCI translation bridge
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US Patent 7159058 State indicating information setting circuit and status bit setting circuit
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US Patent 7159059 Ultra-modular processor in lattice topology
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US Patent 7159060 PCI standard hot-plug controller (SHPC) with user programmable command execution timing
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US Patent 7159062 Electronic shelf unit with management function performed by a common shelf card with the assistance of an auxiliary interface board
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US Patent 7159065 Method for issuing vendor specific requests for accessing ASIC configuration and descriptor memory while still using a mass storage class driver
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US Patent 7162556 Matrix type bus connection system and power reduction method therefor
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US Patent 7162559 System for controlling interrupts between input/output devices and central processing units
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US Patent 7162562 Portable electronic system and accessing method thereof
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US Patent 7162654 Isolation of I2C buses in a multiple power domain environment using switches
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US Patent 7165131 Separating transactions into different virtual channels
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US Patent 7165133 Multiprocessor system having shared buses, prioritized arbitration, and clock synchronization circuitry
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US Patent 7165136 System and method for managing bus numbering
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US Patent 7167937 Bus system
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US Patent 7167939 Asynchronous system bus adapter for a computer system having a hierarchical bus structure
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US Patent 7167940 Data processing method, data processing apparatus, communications device, communications method, communications protocol and program
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US Patent 7171499 Processor surrogate for use in multiprocessor systems and multiprocessor system using same
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US Patent 7171500 Systems and methods for target mode connection management in SAS connections
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US Patent 7171501 System and method for asynchronous transfer of control
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US Patent 7171504 Transmission unit
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US Patent 7171505 Universal network interface connection
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US Patent 7171508 Dual port memory with asymmetric inputs and outputs, device, system and method
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US Patent 7171509 Method and apparatus for host messaging unit for Peripheral Component Interconnect busmaster devices
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US Patent 7174402 Systems, network devices and methods for highly configurable peer-to-peer communications between network devices communicating via a common bus
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US Patent 7174404 Updating spin counters for spin latches
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US Patent 7174405 Method and system for replacing a read-modify-write operation with an atomic set-bits or clear-bits operation
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US Patent 7174410 Method, apparatus and computer program product for write data transfer
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US Patent 7174412 Method and device for adjusting lane ordering of peripheral component interconnect express
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US Patent 7177970 Bus control system
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US Patent 7181551 Backward-compatible parallel DDR bus for use in host-daughtercard interface
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US Patent 7181555 Data communication apparatus, data communication method, and program
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US Patent 7181556 Transaction request servicing mechanism
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US Patent 7181557 Single wire bus for connecting devices and methods of operating the same
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US Patent 7181559 Message based transport mechanism for level sensitive interrupts
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US Patent 7181561 Ordering rule controlled command storage
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US Patent 7181606 Electronic device that uses a communications network for remote reprogramming of the device
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US Patent 7181638 Method and apparatus for skewing data with respect to command on a DDR interface
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US Patent 7185133 Data processor
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US Patent 7185135 USB to PCI bridge
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US Patent 7185138 Multi-dimensional data routing fabric
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US Patent 7185212 Method for PCI express power management using a PCI PM mechanism in a computer system
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US Patent 7185213 Method for PCI Express power management using a PCI PM mechanism in a computer system
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US Patent 7188200 Method for data exchange between an operating and monitoring program and a field device
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US Patent 7188201 Storage system
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US Patent 7188238 Methods and apparatus to update a basic input/output system (BIOS)
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US Patent 7188239 Apparatus with a standby mode, program and control method for an apparatus with a standby mode
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US Patent 7188264 Power management system
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US Patent 7190640 Power control for electronic equipment having a plurality of panels provided oppositely backward and forward
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US Patent 7191271 Two level multi-tier system bus
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US Patent 7191272 Adaptive reader-writer lock
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US Patent 7191276 Hub chip for one or more memory modules
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US Patent 7191323 Information processing unit selecting one of reset vector addresses
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US Patent 7191324 Automatic computer configuration system, method and program making use of portable terminal
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US Patent 7191329 Automated resource management using perceptron prediction
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US Patent 7194614 Boot swap method for multiple processor computer systems
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US Patent 7194643 Apparatus and method for an energy efficient clustered micro-architecture
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US Patent 7194647 Data processing performance control
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US Patent 7194648 Process for time synchronization of at least two clocks in a microprocessor system
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US Patent 7194649 Clock synchronization for network measurements with clock resets
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US Patent 7197592 Method for exchanging data between several stations
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US Patent 7197654 Method and apparatus for managing low power processor states
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US Patent 7197657 BMC-hosted real-time clock and non-volatile RAM replacement
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US Patent 7197659 Global I/O timing adjustment using calibrated delay elements
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US Patent 7200743 Simultaneous initialization of a plurality of memory elements from among a plurality of initialization values
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US Patent 7200762 Providing a low-power state processor voltage in accordance with a detected processor type
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US Patent 7200765 Docking station for a wireless mouse with control of a computer
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US Patent 7200767 Maintaining synchronization of multiple data channels with a common clock signal
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US Patent 7203786 Error-flagging apparatus, systems, and methods
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US Patent 7203787 Information processing apparatus and method that utilizes stored information about a mountable device
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US Patent 7203788 USB-to-VGA converter
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US Patent 7203849 Method and system for distributing power to networked devices
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US Patent 7203859 Variable clock configuration for switched op-amp circuits
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US Patent 7203860 Clock recovery circuit for high-speed data signal transmission
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US Patent 7206928 System boot method
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US Patent 7206929 Method for customizing a computer system by using stored configuration parameters in a configurism mechanism
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US Patent 7206944 Electrical apparatus, computer, and power switching method
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US Patent 7206955 Bundle skew management and cell synchronization
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US Patent 7206960 Bus clock frequency management based on device load
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US Patent 7209991 Packet processing in switched fabric networks
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US Patent 7210029 System and method for transferring rewrite programs to two computers in a processing system
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US Patent 7210030 Programmable memory initialization system and method
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US Patent 7210033 Method, system, and computer-readable medium for enabling multi-segmented recovery of basic input output system program code in a computer system
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US Patent 7210055 Electronic control apparatus
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US Patent 7216194 Methods and systems for improving delayed read handling
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US Patent 7216248 On-chip clock generator allowing rapid changes of on-chip clock frequency
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US Patent 7219219 Hardware initialization method that is independent of boot code architecture
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US Patent 7219220 Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection
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US Patent 7219253 Process for providing submodel performance in a computer processing unit
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US Patent 7222244 Semiconductor device including a prediction circuit to control a power status control circuit which controls the power status of a function circuit
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US Patent 7222245 Managing system power based on utilization statistics
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US Patent 7222247 Multiple-mode computer slot initialization
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US Patent 7222249 Electronic apparatus and method of setting system environment of the electronic apparatus
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US Patent 7222252 Power management of computer peripheral devices which determines non-usage of a device through usage detection of other devices
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US Patent 7225282 Method and apparatus for a two-wire serial command bus interface
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US Patent 7225325 Customizing a computer system by using stored configuration parameters in a configuration mechanism
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US Patent 7225347 Method and apparatus for enabling a low power mode for a processor
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US Patent 7228406 Interacting with optional read-only memory
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US Patent 7228443 Computer and power saving control method thereof
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US Patent 7228444 System and method for preserving state data of a personal computer in a standby state in the event of an AC power failure
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US Patent 7228446 Method and apparatus for on-demand power management
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US Patent 7228447 Methods and apparatus for monitoring a power source
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US Patent 7228449 Method and device for transmitting a selection signal from a processor to a peripheral by violating a symmetry of transmission of a data signal
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US Patent 7229231 Joint
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US Patent 7231515 Method and system for maintaining the boot order of mass storage devices in a computer system
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US Patent 7231536 Control circuit for self-compensating delay chain for multiple-data-rate interfaces
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US Patent 7231538 Synchronized communication between integrated circuit chips
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US Patent 7231539 Reset circuit for resetting two clock domains
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US Patent 7234048 Method for initializing or configuring an electrical circuit
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US Patent 7234049 Computer system with NAND flash memory for booting and storage
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US Patent 7234056 Method and apparatus for downloading executable code in a non-disruptive manner
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US Patent 7234066 Server, client, and method for shutting down power of computers on network
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US Patent 7234067 Autonomous thermal management
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US Patent 7234069 Precise phase shifting using a DLL controlled, multi-stage delay chain
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US Patent 7237047 Data transfer control device, electronic equipment, and data transfer control method
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US Patent 7237101 Methods and apparatus for self describing devices
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US Patent 7237102 Methods and apparatus for configuring hardware resources in a pre-boot environment without requiring a system reset
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US Patent 7237103 Computing device deployment using mass storage device
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US Patent 7237105 Startup system and method using boot code
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US Patent 7237127 Portable electronic device and power control method thereof
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US Patent 7237131 Transaction-based power management in a computer system
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US Patent 7240139 Disk array control device with two different internal connection systems
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US Patent 7240187 Method and apparatus to support legacy master boot record (MBR) partitions
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US Patent 7240222 Using ACPI power button signal for remotely controlling the power of a PC
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US Patent 7240224 Inline power based device communications
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US Patent 7240226 Electronic apparatus, power controlling apparatus and power controlling method
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US Patent 7240227 Automatic restart and resume of computing system upon reapplication of external power
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US Patent 7240231 System and method for synchronizing multiple instrumentation devices
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US Patent 7243221 Method and apparatus for controlling a processor in a data processing system
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US Patent 7243244 Microprocessor and operation mode switching method for the microprocessor
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US Patent 7243245 Method and system for performing automatic startup application launch elimination
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US Patent 7243252 Synchronization circuit for transferring data using a bus of a different width
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US Patent 7243253 Repeating switching of a cross-connect and a timing source in a network element through the use of a phase adjuster
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US Patent 7243254 Low power memory controller that is adaptable to either double data rate DRAM or single data rate synchronous DRAM circuits
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US Patent 7246223 System and method for monitoring configuration changes in a document processing device
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US Patent 7246252 Delay compensation
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US Patent 7249209 System and method for dynamically allocating inter integrated circuits addresses to multiple slaves
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US Patent 7249214 Sliced crossbar architecture with no inter-slice communication
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US Patent 7249267 Method and system for communicating filter compensation coefficients for a digital power control system
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US Patent 7249273 Synchronized serial interface
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US Patent 7249274 System and method for scalable clock gearing mechanism
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US Patent 7251739 System and method for sequencing multiple write state machines
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US Patent 7251740 Apparatus coupling two circuits having different supply voltage sources
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US Patent 7254662 Data link layer device for a serial communication bus
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US Patent 7254701 Method and device for safeguarding a digital process device
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US Patent 7254726 System and method for managing system events by creating virtual events in an information handling system
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US Patent 7254729 Processing system and memory module having frequency selective memory
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US Patent 7254730 Method and apparatus for a user to interface with a mobile computing device
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US Patent 7257498 System and method for the safe automatic detection of a field device communicating with current modulated signal
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US Patent 7257720 Semiconductor processing device for connecting a non-volatile storage device to a general purpose bus of a host system
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US Patent RE39786 Clamp with improved internal cam action
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US Patent 7260713 Apparatus and method for building, storing, uploading, relocating and executing DOS based software module during system startup time
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US Patent 7260736 Method and apparatus for detecting and correcting clock duty cycle skew in a processor
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US Patent 7263625 Power supply controller for changing in a predetermined temporal order a combination of voltages supplied to an information processor
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US Patent 7263627 System and method having strapping with override functions
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US Patent 7263628 Method and apparatus for receiver circuit tuning
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US Patent 7266710 Power throttle controller
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US Patent 7266713 Apparatus and method for adaptation of time synchronization of a plurality of multimedia streams
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US Patent 7269722 Preview of UNIX boot process from multi-user level
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US Patent 7269746 Method of transmitting identification data from an option pack to a main unit before the option pack is fully powered
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US Patent 7269747 Physical presence determination in a trusted platform
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US Patent 7269751 Supplying power to at least one electrical device based on an efficient operating point of a power supply
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US Patent 7269752 Dynamically controlling power consumption within a network node
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US Patent 7269754 Method and apparatus for flexible and programmable clock crossing control with dynamic compensation
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US Patent 7272712 Data structure and method for managing modules associated with a kernel
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US Patent 7272734 Memory management to enable memory deep power down mode in general computing systems
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US Patent 7272740 Performance indication system for use with a universal serial bus signal and a method of operation thereof
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US Patent 7272744 Method for signaling during a transaction and receiving unit and system for use therewith
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US Patent 7275150 Method and system for adding frequently selected applications to a computer startup sequence
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US Patent 7275151 Nodelay per port
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US Patent 7275165 Information handling system including wireless scanning feature
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US Patent 7275167 Task-oriented processing as an auxiliary to primary computing environments
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US Patent 7275169 Graphical view of shutdown process
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US Patent 7275172 Apparatus and method for generating a delayed clock signal
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US Patent 7275174 Self-aligning data path converter for multiple clock systems
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US Patent 7278036 System and method for starting up plural electronic devices in an orderly manner
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US Patent 7278038 Operational voltage control circuit and method
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US Patent 7278039 Physical layer energy saving technique for transceivers
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US Patent 7278040 Mechanism for providing measured power management transitions in a microprocessor
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US Patent 7278043 System, method, and apparatus for overload detection in real-time data processing applications
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US Patent 7278044 Semiconductor memory device for reducing address access time
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US Patent 7278045 Apparatus and method for generating a delayed clock signal
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US Patent 7278047 Providing different clock frequencies for different interfaces of a device
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US Patent 7281124 Establishing a virtual drive accessible to pre-boot and operating system runtime phases
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US Patent 7281140 Digital throttle for multiple operating points
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US Patent 7281146 Dynamic power requirement budget manager
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US Patent 7281150 Methods and apparatus for controlling operation of a data storage system
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US Patent 7284120 Method and system for allowing a system under test (SUT) to boot a plurality of operating systems without a need for local media
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US Patent 7284143 System and method for reducing clock skew
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US Patent 7287153 Processing of processor performance state information
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US Patent 7287170 Method and apparatus for power management using system and request tokens
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US Patent 7287171 Systems and methods for reducing static and total power consumption in programmable logic device architectures
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US Patent 7287176 Apparatus, method and storage medium for carrying out deskew among multiple lanes for use in division transmission of large-capacity data
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US Patent 7287280 Automated security management
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US Patent 7290152 Method and system for managing power within a compute component of a multiprocessor system
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US Patent 7290156 Frequency-voltage mechanism for microprocessor power management
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US Patent 7290159 Fixed latency data computation and chip crossing circuits and methods for synchronous input to output protocol translator supporting multiple reference oscillator frequencies
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US Patent 7290161 Reducing CPU and bus power when running in power-save modes
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US Patent 7293165 BMC-hosted boot ROM interface
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US Patent 7293182 Methods and apparatus for powering a data communications port
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US Patent 7293188 Low voltage detection system
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US Patent 7293190 Noisy clock test method and apparatus
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US Patent 7296142 Multi-tiered retry scheme for reading copies of information from a storage medium
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US Patent 7296173 Semiconductor integrated circuit
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US Patent 7296175 System on a chip bus with automatic pipeline stage insertion for timing closure
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US Patent 7299344 Setup support system, physical access driver, and setup support method
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US Patent 7299346 Method and apparatus to minimize computer apparatus initial program load and exit/shut down processing
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US Patent 7299348 Programmable field mounted device
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US Patent 7299368 High power architecture for power over Ethernet
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US Patent 7302596 Circuit capable of updating power supply specification of microprocessor and method thereof
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US Patent 7302599 Instantaneous frequency-based microprocessor power management
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US Patent 7305508 Semaphoring system between system firmware and hardware manipulation subsystem
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US Patent 7305544 Interleaved boot block to support multiple processor architectures and method of use
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US Patent 7308571 Overriding processor configuration settings
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US Patent 7308590 Automatic dynamic processor operating voltage control
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US Patent 7308594 Apparatus and method for generating a delayed clock signal
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US Patent 7308595 Method and device for generating an internal time base for a diagnostic function for an output module
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US Patent 7310725 Common platform pre-boot and run-time firmware services
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US Patent 7310737 Cooling system for computer systems
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US Patent 7313681 Apparatus, system, and method for adapter fastload
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US Patent 7313708 Interlocked plug and play with power management for operating systems
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US Patent 7313709 Instruction set with thermal opcode for high-performance microprocessor, microprocessor, and method therefor
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US Patent 7313712 Link power saving state
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US Patent 7313715 Memory system having stub bus configuration
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US Patent 7315939 Microcomputer having clock control circuit and initializing method thereof
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US Patent 7315940 Recovery of a network element after a restart
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US Patent 7315956 Method and apparatus for timing and event processing in wireless systems
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US Patent 7318148 Automatically configuring a computer
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US Patent 7318149 Semi-persistent relocatable ram-based virtual floppy disk method
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US Patent 7320077 Power supply controlling apparatus of a device connected to a serial bus
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US Patent 7321976 Information processing apparatus, power supply control method for plural information processing apparatuses, and storage medium therefore
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US Patent 7325125 Computer system for accessing initialization data and method therefor
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US Patent 7325148 Power supply management system in parallel processing system by OS for single processors and power supply management program therefor
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US Patent 7325789 Box beam terminals
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US Patent 7328355 Data processing device and semiconductor device
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US Patent 7328361 Digital bus synchronizer for generating read reset signal
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US Patent 7330993 Slew rate control mechanism
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US Patent 7334117 Device boot loader for processing one or more requests from a host computer system concurrently with loading or updating the firmware of the device
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US Patent 7334120 Firmware emulation environment for developing, debugging, and testing firmware components including option ROMs
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US Patent 7334139 Power supply control apparatus, power supply control system, and administration apparatus
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US Patent 7334145 Predictive processor speed governor
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US Patent 7334149 Clock distribution architecture with spread spectrum
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US Patent 7334153 Low-speed DLL employing a digital phase interpolator based upon a high-speed clock
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US Patent 7337308 System and method for initiating dialup creation from modem connection to a mobile device
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US Patent 7337310 Computer disposal apparatus, system, and method
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US Patent 7337312 Processor and firmware download method for same
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US Patent 7337334 Network processor power management
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US Patent 7337335 Method and apparatus for on-demand power management
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US Patent 7337338 Information handling system capable of operation in reduced power states
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US Patent 7337344 Methods and apparatus for synchronizing devices on different serial data buses
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US Patent 7340593 Hard drive reset cache
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US Patent 7340596 Embedded processor with watchdog timer for programmable logic
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US Patent 7340617 System and method of dynamically controlling storage device power supply current
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US Patent 7340623 Power-save computing apparatus and method, a power-save computing program and a program product
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US Patent 7340627 Method and system for supplementing current during enumeration of a USB device
‌
US Patent 7340631 Drift-tolerant sync pulse circuit in a sync pulse generator
‌
US Patent 7340635 Register-based de-skew system and method for a source synchronous receiver
‌
US Patent 7343483 Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit stream
‌
US Patent 7343511 Method and apparatus for data transfer, image forming apparatus, and computer product
‌
US Patent 7346765 Systems and methods for facilitating computer system recovery
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US Patent 7346784 Integrated circuit device programming with partial power
‌
US Patent 7346788 Method and system for monitoring module power information in a communication device
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US Patent 7350064 Computer system having an identification device
‌
US Patent 7350065 Method, apparatus and program storage device for providing a remote power reset at a remote server through a network connection
‌
US Patent 7350093 Apparatus and method for generating a delayed clock signal
‌
US Patent 7353311 Method of accessing information and system therefor
‌
US Patent 7353419 Apparatus and method to balance set-up and hold times
‌
US Patent 7360004 Powering a notebook across a USB interface
‌
US Patent 7360102 Methods and apparatus for achieving thermal management using processor manipulation
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US Patent 7363408 Interruption control system and method
‌
US Patent 11181663 Determining rupture envelopes of a fault system
‌
US Patent 11182517 Modification data for additive manufacturing
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US Patent 11183061 Parking monitoring for wait time prediction
‌
US Patent 7366816 Method and apparatus for adaptively adjusting the bandwidth of a data transmission channel having multiple buffered paths
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US Patent 7366888 Booting to a recovery/maintenance environment
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US Patent 7366927 Method and device for handling requests for changing system mode
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US Patent 7366928 Voltage regulation control unit for determining a percent voltage regulation of a CPU core voltage based on a spec signal from the CPU
‌
US Patent 7366939 Providing precise timing control between multiple standardized test instrumentation chassis
‌
US Patent 7370186 Multi-tasking bootstrap system and method
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US Patent 7370188 Input/output scanning
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US Patent 7370213 Power supply unit and computer
‌
US Patent 7370216 Conserving power by reducing voltage supplied to an instruction-processing portion of a processor
‌
US Patent 7370217 Regulating file system device access
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US Patent 7373491 Processor with versatile external memory interface
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US Patent 7373526 System and method for managing power in an ASF system
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US Patent 7373534 Reducing storage data transfer interference with processor power management
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US Patent 7373538 Method for determining interconnect line performance within an integrated circuit
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US Patent 7376821 Data processing system and method
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US Patent 7376822 Method of initializing multiple devices using job scheduler
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US Patent 7376847 Power distribution control circuit for multi-power domain electronic circuits
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US Patent 7376848 Battery powered device with dynamic power and performance management
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US Patent 7376850 Methods of computer power status management and computers utilizing the same
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US Patent 7376852 Method for controlling power change for a semiconductor module
‌
US Patent 7376853 Network apparatus, method for controlling the same, and program for the same
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US Patent 7380113 Method for updating memory resident firmware as a background operation
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US Patent 7380114 Integrated circuit with DMA module for loading portions of code to a code memory for execution by a host processor that controls a video decoder
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US Patent 7383429 Configuring settings of a computer system to be compatible with an operating system
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US Patent 7383431 Control system and method for rewriting data in a flash memory and a data storage medium in which a program is stored for rewriting data in a flash memory
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US Patent 7383448 Power management apparatus, printer, file server, printing system and computer software
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US Patent 7383453 Conserving power by reducing voltage supplied to an instruction-processing portion of a processor
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US Patent 7386712 Firmware developer user interface with break command polling
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US Patent 7386737 Method and apparatus to control temperature of processor
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US Patent 7386738 Method for waking up a sleeping device, a related network element and a related waking device
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US Patent 7389434 Keep awake heuristic
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US Patent 7389435 System and method for the frequency management of computer systems to allow capacity on demand
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US Patent 7389440 Method, system, and apparatus for improving multi-core processor performance
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US Patent 7392371 Method and apparatus for using a volume top file to boot firmware modules
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US Patent 7392408 Method and apparatus for selectively performing lock-out function in integrated circuit device
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US Patent 7392410 Power adapter having power supply identifier information functionality
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US Patent 7392414 Method, system, and apparatus for improving multi-core processor performance
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US Patent 7395420 Using protected/hidden region of a magnetic media under firmware control
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US Patent 7395422 Method and system of changing a startup list of programs to determine whether computer system performance increases
‌
US Patent 7395447 Precision oscillator for an asynchronous transmission system
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US Patent 7398381 Utilizing paging to support dynamic code updates
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US Patent 7398407 Method and apparatus for on-demand power management
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US Patent 7398409 Semiconductor integrated circuit and its power-saving control method and program
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US Patent 7401214 Method for executing computer function options with intelligent memory for computer-based multimedia system
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US Patent 7401236 Peripheral device and its control method its main body device and its control method and its program
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US Patent 7401240 Method for dynamically managing power in microprocessor chips according to present processing demands
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US Patent 7401246 Nibble de-skew method, apparatus, and system
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US Patent 7404071 Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices
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US Patent 7404074 Self-booting software defined radio module
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US Patent 7404090 Device and computer system for power management using serial link connections
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US Patent 7406609 Method and apparatus for minimizing leakage current in semiconductor logic
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US Patent 7406616 Data de-skew method and system
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US Patent 7409538 Update in-use flash memory without external interfaces
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US Patent 7412596 Method for preventing system wake up from a sleep state if a boot log returned during the system wake up cannot be authenticated
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US Patent 7412609 Handling wake events in a device driver
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US Patent 7412613 Integrated circuit devices that support dynamic voltage scaling of power supply voltages
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US Patent 7412616 Semiconductor integrated circuit
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US Patent 7418586 Method and apparatus for assigning devices to a partition
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US Patent 7418587 Compound computer machine and management method of compound computer machine
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US Patent 7418607 Automatic power conservation method for an optical media device
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US Patent 7418614 External signal detection circuit and real-time clock
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US Patent 7421595 Device and method for managing a standby state of a microprocessor
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US Patent 7421606 DLL phase detection using advanced phase equalization
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US Patent 7421610 Clock generation circuit
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US Patent 7421639 Information storage medium on which drive data is recorded, and method of recording information on the information storage medium
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US Patent 7424623 Personal computer integrated with personal digital assistant
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US Patent 7424624 Rack equipment power purchase plan supervision system and method
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US Patent 7424625 Printing apparatus and power supply control method in printing apparatus
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US Patent 7424626 Laptop computer recharging using Ethernet connection
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US Patent 7424628 Serial type interface circuit, power saving method thereof, and device having serial interface
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US Patent 7424630 Multiprocessor system with selective processor power down of core and inter-processor communications ports
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US Patent 7426632 Clock distribution for interconnect structures
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US Patent 7426645 Digital power supply controller with integrated microcontroller
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US Patent 7426646 Computer apparatus, storage apparatus, system management apparatus, and hard disk unit power supply controlling method
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US Patent 7428647 System and method for managing information handling system display response time
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US Patent 7428653 Method and system for execution and latching of data in alternate threads
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US Patent 7428654 Data transfer circuit for transferring data between a first circuit block and a second circuit block
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US Patent 7430658 Method and apparatus for controlling a processor in a data processing system
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US Patent 7430672 Method and apparatus to monitor power consumption of processor
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US Patent 7430673 Power management system for computing platform
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US Patent 7430674 Magnetic stripe reader with power management control for attachment to a PDA device
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US Patent 7430679 Charging of mobile devices
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US Patent 7434042 Apparatus, method and recording medium for starting up data processing system
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US Patent 7434071 Multi-state recognition device of server blade system
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US Patent 7434078 Synchronization with hardware utilizing software clock slaving via a clock
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US Patent 7434081 System and method for read synchronization of memory modules
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US Patent 7434137 Retransmission ordering method, wireless communication system, receiver and transmitter
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US Patent 7437575 Low power mode for device power management
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US Patent 7437577 Information processing apparatus and power consumption control method
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US Patent 7437578 Advanced sleep timer
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US Patent 7437579 System and method for selective memory module power management
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US Patent 7437582 Power control in a data flow processing architecture
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US Patent 7437583 Method and system for flexible clock gating control
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US Patent 7437588 Circuit card synchronization within a standardized test instrumentation chassis
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US Patent 7437589 Providing precise timing control within a standardized test instrumentation chassis
‌
US Patent 7441113 Method and apparatus for virtualization of appliances
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US Patent 7441129 Regulator for reducing power supply transient voltages
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US Patent 7441132 Circuit for enabling dual mode safe power-on sequencing
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US Patent 7444502 Method for changing booting configuration and computer system capable of booting OS
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US Patent 7444527 Circuit for saving power of a battery within an electronic equipment while the electronic equipment is powered off
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US Patent 7444528 Component reliability budgeting system
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US Patent 7444557 Memory with fault tolerant reference circuitry
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US Patent 7447892 Operating system activation key embedding handling method and system
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US Patent 7447899 Method for conserving system resources
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US Patent 7447923 Systems and methods for mutually exclusive activation of microprocessor resources to control maximum power
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US Patent 7447928 Method for booting computer multimedia systems with a hot key standby state
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US Patent 7447932 Semiconductor data processing device and data processing system
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US Patent 7451333 Coordinating idle state transitions in multi-core processors
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US Patent 7451337 Guaranteed edge synchronization for multiple clocks
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US Patent 7454633 Integrated circuit card for reducing power consumption
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US Patent 7454639 Various apparatuses and methods for reduced power states in system memory
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US Patent 7454644 Integrated circuit with low current consumption having a one wire communication interface
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US Patent 7454646 Efficient clocking scheme for ultra high-speed systems
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US Patent 7454689 Method for detecting and correcting operating data errors
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US Patent 7458003 Low-complexity, capacity-achieving code for communication systems
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US Patent 7461284 Adaptive elasticity FIFO
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US Patent 7461285 Programmable resistor array having current leakage control
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US Patent 7464282 Apparatus and method for producing dummy data and output clock generator using same
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US Patent 7467295 Determining a boot image based on a requesting client address
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US Patent 7467309 Point of load regulator having a pinstrapped configuration and which performs intelligent bus monitoring
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US Patent 7467310 Systems and methods for reducing static and total power consumption in programmable logic device architectures
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US Patent 7467318 Adaptive temperature dependent feedback clock control system and method
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US Patent 7468934 Clock with link to the internet
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US Patent 7472305 Method and apparatus for limiting the output frequency of an on-chip clock generator
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US Patent 7478258 Identifying a processor in a multiprocessor system
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US Patent 7484113 Delay locked loop for an FPGA architecture
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US Patent 7487369 Low-power cache system and method
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US Patent 7490254 Increasing workload performance of one or more cores on multiple core processors
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US Patent 7490255 Power efficient flow control model for USB asynchronous transfers
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US Patent 7493501 Apparatus and method for controlling system operation based on battery state
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US Patent 7500115 Information handling system including a memory device capable of being powered by a battery
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US Patent 11186123 Vehicle tire pitch sequence design methodology and associated reduced road noise vehicle tires
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US Patent 11188689 Asphaltene phase instability analysis in gas charges into oil reservoirs
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US Patent 7536575 Methods of clock throttling in an integrated circuit
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US Patent 7555669 Timing vector program mechanism
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US Patent 7594260 Network surveillance using long-term and short-term statistical profiles to determine suspicious network activity
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US Patent 7810012 Format for randomized data block in a storage device
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US Patent 8005812 Collaborative modeling environment
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US Patent 8010488 Information distribution system, information processing device and memory medium
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US Patent 8010535 Optimization of discontinuous rank metrics
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US Patent 8010566 Extended multimedia file structure and multimedia file producting method and multimedia file executing method
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