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Shane M Thomas

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Edits on 14 Dec, 2021
"Remove inverse infobox"
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Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox (-126 properties)
Infobox
Patent primary examiner of
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US Patent 7447835 Determining the accessibility of a portable storage device using format and access right information
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US Patent 7461213 Advanced processor system using request, data, snoop, and response rings
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US Patent 7461215 Advanced processor with implementation of memory ordering on a ring based data movement network
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US Patent 7484063 Sorting method and apparatus using a CAM
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US Patent 7506110 Memory controller having programmable initialization sequence
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US Patent 7506118 Storage control subsystem for managing the online and offline states of logical volumes
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US Patent 7509453 Pseudo-mounting unformatted removable media
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US Patent 7509462 Advanced processor with use of bridges on a data movement ring for optimal redirection of memory and I/O traffic
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US Patent 7509473 Segmented storage system mapping
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US Patent 7509476 Advanced processor translation lookaside buffer management in a multithreaded system
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US Patent 7512764 Method for allocating a memory of a de-interleaving unit
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US Patent 7519771 System and method for processing memory instructions using a forced order queue
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US Patent 7523276 Synchronization of selected data from snapshots stored on different storage volumes
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US Patent 7526610 Sectored cache memory
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US Patent 7529893 Multi-node system with split ownership and access right coherence mechanism
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US Patent 7536500 Header blocks for flash memory writes
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US Patent 7549029 Methods for creating hierarchical copies
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US Patent 7552271 Nonvolatile memory with block management
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US Patent 7552290 Method for maintaining atomicity of instruction sequence to access a number of cache lines during proactive synchronization within a computer system
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US Patent 7552293 Kernel and application cooperative memory management
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US Patent 7552296 Symmetrical data change tracking
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US Patent 7558905 Reclaiming data storage capacity in flash memory systems
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US Patent 7558906 Methods of managing blocks in nonvolatile memory
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US Patent 7558931 Write/read apparatus to control overwriting
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US Patent 7571292 Producing tertiary instant virtual copies without volume suspension
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US Patent 7574575 Disk array device including a system LU for storing control information in the disk array and backup LU for backing up the control information and controlling method thereof
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US Patent 7581057 Memory system with management of memory blocks that directly store data files
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US Patent 7581070 Multi-chip package device having alternately-enabled memory chips
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US Patent 7594079 Data cache virtual hint way prediction, and applications thereof
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US Patent 7603529 Methods, systems, and computer program products for mapped logical unit (MLU) replications, storage, and retrieval in a redundant array of inexpensive disks (RAID) environment
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US Patent 7613871 Storage system using a flash memory partitioned with write-once and rewritable blocks
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US Patent 7627713 Method and apparatus to maintain data integrity in disk cache memory during and after periods of cache inaccessibility
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US Patent 7627717 Advanced processor messaging apparatus including fast messaging ring components configured to accomodate point-to-point transfer of non-memory related messages
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US Patent 7627721 Advanced processor with cache coherency
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US Patent 7627728 System and method for efficient generation of application snapshots
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US Patent 7631161 Apparatus, system, and method for writing data to protected partitions of storage media
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US Patent 7634616 Remote disk control apparatus, and remote disk control method
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US Patent 7636821 Asynchronous hybrid mirroring system
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US Patent 7653779 Memory storage using a look-up table
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US Patent 7653792 Disk array apparatus including controller that executes control to move data between storage areas based on a data protection level
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US Patent 7680987 Sub-page-granular cache coherency using shared virtual memory mechanism
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US Patent 7689785 Digital device configuration and method
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US Patent 7689787 Device and method for controlling number of logical paths
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US Patent 7694086 Method and system for incremental backup of data volumes
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US Patent 7698498 Memory controller with bank sorting and scheduling
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US Patent 7711908 Virtual storage system for virtualizing a plurality of storage systems logically into a single storage resource provided to a host computer
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US Patent 7716422 Storage apparatus and method for using a non-volatile cache memory organized into stationary and non-stationary circular regions
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US Patent 7716451 Memory tuning for garbage collection and central processing unit (CPU) utilization optimization
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US Patent 7721047 System, method and computer program product for application-level cache-mapping awareness and reallocation requests
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US Patent 7721056 Storage system, disk array apparatus, volume presentation method, and data consistency confirmation method
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US Patent 7725674 Hard drive eraser
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US Patent 7734868 Universal RAID class driver
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US Patent 7734879 Efficiently boosting priority of read-copy update readers in a real-time data processing system
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US Patent 7739444 System using a direct data file system with a continuous logical address space interface
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US Patent 7743202 Command controller, prefetch buffer and methods for accessing a serial flash in an embedded system
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US Patent 7752386 Application performance acceleration
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US Patent 7752387 Offloading firmware update tasks from RAID adapter to distributed service processors in switched drive connection network enclosure
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US Patent 7761669 Memory controller granular read queue dynamic optimization of command selection
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US Patent 7765361 Enforced transaction system recoverability on media without write-through
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US Patent 7774541 Storage apparatus using non-volatile memory as cache and method of managing the same
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US Patent 7774542 System and method for adaptive operation of storage capacities of RAID systems
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US Patent 7774570 Storage virtualization switch
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US Patent 7783851 Methods of reusing log blocks in non-volatile memories and related non-volatile memory devices
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US Patent 7783853 Memory usage techniques in middleware of a real-time data distribution system
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US Patent 7783855 Keymap order compression
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US Patent 7788449 Cache configuration in a database system
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US Patent 7793047 Apparatus and method for generating a secondary cache index
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US Patent 7809886 RAID controller using capacitor energy source to flush volatile cache data to non-volatile memory during main power outage
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US Patent 7809895 Low overhead access to shared on-chip hardware accelerator with memory-based interfaces
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US Patent 7818517 Architecture for virtualization of networked storage resources
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US Patent 7827383 Efficient on-chip accelerator interfaces to reduce software overhead
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US Patent 7831767 Storage control system, control method for storage control system, port selector, and controller
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US Patent 7831778 Shared nonvolatile memory architecture
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US Patent 7831786 Sharing memory resources of wireless portable electronic devices
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US Patent 7831792 Computer system, data migration method and storage management server
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US Patent 7836264 Method of replicating data between computing devices which each use local clocks
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US Patent 7840745 Data accessing system, controller and storage device having the same, and operation method thereof
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US Patent 7840759 Shared cache eviction
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US Patent 7856534 Transaction references for requests in a multi-processor network
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US Patent 7861055 Method and system for on-chip configurable data ram for fast memory and pseudo associative caches
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US Patent 7865668 Two-sided, dynamic cache injection control
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US Patent 7865675 Controlling cleaning of data values within a hardware accelerator
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US Patent 7870337 Power-aware line intervention for a multiprocessor snoop coherency protocol
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US Patent 7870346 Servo controller interface module for embedded disk controllers
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US Patent 7873804 Apparatus for facilitating disaster recovery
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US Patent 7900017 Mechanism for remapping post virtual machine memory pages
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US Patent 7904636 System and method for accessing interleaved data in a memory device
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US Patent 7904639 Modular command structure for memory and memory system
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US Patent 7908439 Method and apparatus for efficient replacement algorithm for pre-fetcher oriented data cache
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US Patent 7917686 Host system with direct data file interface configurability
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US Patent 7930502 Disk array apparatus and control method for disk array apparatus
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US Patent 7934069 Enabling and disabling cache in storage systems
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US Patent 7941603 Method and apparatus for implementing cache coherency of a processor
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US Patent 7941619 Space-optimized backup set conversion
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US Patent 7945761 Maintaining validity of cached address mappings
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US Patent 7949825 Disk array synchronization using power distribution
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US Patent 7953930 Device identifiers for nonvolatile memory modules
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US Patent 7953931 High endurance non-volatile memory devices
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US Patent 7958300 Data storage methods and systems for use on a mobile device
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US Patent 7958301 Memory controller and method for memory pages with dynamically configurable bits per cell
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US Patent 7958313 Target computer processor unit (CPU) determination during cache injection using input/output (I/O) adapter resources
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US Patent 7958314 Target computer processor unit (CPU) determination during cache injection using input/output I/O) hub/chipset resources
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US Patent 7966454 Issuing global shared memory operations via direct cache injection to a host fabric interface
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US Patent 7966473 Optimised storage addressing method
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US Patent 7970980 Method and apparatus for accessing memory in a computer system architecture supporting heterogeneous configurations of memory structures
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US Patent 7970993 Rotating parity redundant array of independent disk and method for storing parity the same
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US Patent 7970997 Program section layout method and layout program
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US Patent 7970998 Parallel caches operating in exclusive address ranges
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US Patent 7984251 Autonomic storage provisioning to enhance storage virtualization infrastructure availability
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US Patent 7984253 Architecture for virtualization of networked storage resources
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US Patent 7984257 System for protecting supervisor mode data from user code
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US Patent 7984259 Reducing load imbalance in a storage system
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US Patent 7984263 Structure for a memory-centric page table walker
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US Patent 7991948 Optimizing execution of I/O requests for a disk drive in a computing system
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US Patent 7991976 Permanent pool memory management method and system
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US Patent 7991977 Advanced processor translation lookaside buffer management in a multithreaded system
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US Patent 7996602 Parallel memory device rank selection
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US Patent 7996603 DRAM controller that forces a refresh after a failed refresh request
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US Patent 7996644 Fair sharing of a cache in a multi-core/multi-threaded processor by dynamically partitioning of the cache
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US Patent 8001334 Bank sharing and refresh in a shared multi-port memory device
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US Patent 8001342 Method for storing and restoring persistent memory content and virtual machine state information
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US Patent 8006043 System and method for maintaining memory page sharing in a virtual environment
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US Patent 8006058 Method and securing electronic device data processing
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US Patent 8010752 Performing initialization for non access-selected memory device supporting multimediacard (MMC) interface
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US Patent 8010753 Systems and methods for temporarily transferring use of portions of partitioned memory between host computers
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US Patent 8010754 Memory micro-tiling
Edits on 8 Dec, 2021
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Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8010754 Memory micro-tiling
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8006058 Method and securing electronic device data processing
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8006043 System and method for maintaining memory page sharing in a virtual environment
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 8001334 Bank sharing and refresh in a shared multi-port memory device
Edits on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7996603 DRAM controller that forces a refresh after a failed refresh request
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7996602 Parallel memory device rank selection
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7991977 Advanced processor translation lookaside buffer management in a multithreaded system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7991976 Permanent pool memory management method and system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7991948 Optimizing execution of I/O requests for a disk drive in a computing system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7984263 Structure for a memory-centric page table walker
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7984259 Reducing load imbalance in a storage system
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7984253 Architecture for virtualization of networked storage resources
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7984257 System for protecting supervisor mode data from user code
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Golden AI profile picture
Golden AI
edited on 8 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7970998 Parallel caches operating in exclusive address ranges

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