US Patent 10008249 Semiconductor memory device with increased operating speed

A semiconductor memory device includes a memory cell array comprising a plurality of spin torque transfer-magnetic random access memory (STT-MRAM) cells connected to a plurality of word lines, a plurality of bit lines and a plurality of sense lines. A peripheral circuitry supplies cell current to the memory cells during read/write operations, such that the cell current supplied to memory cells of a selected word line vary according to a position of a word line group including the selected word line.