Patent attributes
Embedded fuse structures and fabrication techniques. An embedded fuse may include a non-planar conductive line having two high-z portions extending to a greater z-height than a low-z portion of reduced current carrying capability disposed there between. A dielectric disposed over the low-z portion has a top surface planar with the high-z line portions to which fuse contacts may be landed. Fabrication of an embedded fuse may include undercutting a region of a first dielectric material disposed over a substrate. The undercut region is lined with a second dielectric material. A pair of electrically joined fuse ends are formed by backfilling the lined undercut region with a conductive material. In advantageous embodiments, fuse fabrication is compatible with high-K, metal gate transistor and precision polysilicon resistor fabrication flows.
