Patent attributes
An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber, wherein the substrate comprises a copper layer having an exposed surface and a low-k dielectric layer having an exposed surface, forming a metal layer over the exposed surface of the copper layer, wherein the exposed surface of the low-k dielectric layer is free from the metal layer, and forming a metal-based dielectric layer over the metal layer and over at least part of the exposed low-k dielectric surface, wherein the metal-based dielectric layer comprises an aluminum compound.