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US Patent 10014318 Semiconductor memory device, structure and methods
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Patent
Date Filed
October 24, 2016
Date of Patent
July 3, 2018
Patent Application Number
15333138
Patent Citations Received
US Patent 11244718 Control of NAND flash memory for al applications
US Patent 11563005 Three-dimensional semiconductor device with a bit line perpendicular to a substrate
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US Patent 11672123 Three-dimensional memory array with local line selector
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US Patent 10950704 Vertical memory devices
US Patent 11515318 3D floating-gate multiple-input device
Patent Inventor Names
Zvi Or-Bach
0
Jin-Woo Han
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10014318
Patent Primary Examiner
George Fourson, III
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