Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
July 24, 2018
Patent Application Number
15422724
Date Filed
February 2, 2017
Patent Citations Received
Patent Primary Examiner
Patent abstract
A method of forming a spacer for a vertical transistor is provided. The method includes forming a fin structure that includes a fin on a semiconductor substrate, forming a source junction or a drain junction at an upper surface of the semiconductor substrate and at a base of the fin and epitaxially growing a rare earth oxide (REO) spacer to have a substantially uniform thickness along respective upper surfaces of the source or drain junction and on opposite sides of the fin structure.
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