Patent attributes
An analog-to-digital converter includes a comparator, a capacitive digital-to-analog converter (DAC), and calibration circuitry. The capacitive DAC is coupled to the comparator, and includes a plurality of capacitors. The calibration circuitry is configured to adjust a value of each of the capacitors, and includes binary search circuitry and error correction circuitry. The binary search circuitry applies a binary search over a first number of bits of a multi-bit adjustment value used to adjust the value of one of the capacitors, and averages a first number of comparator output samples to determine each of the first number of bits. The error correction circuitry applies an error correction to the multi-bit adjustment value generated by the binary search, and averages a second number of comparator output samples for the error correction. The second number of comparator output samples is greater than the first number of comparator output samples.
