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US Patent 10050774 Mitigating interaction between adaptive equalization and timing recovery
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Patent
Date Filed
May 2, 2017
Date of Patent
August 14, 2018
Patent Application Number
15584897
Patent Citations Received
US Patent 11757458 Digital phase-locked loop circuit
Patent Inventor Names
Yehuda Azenkot
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Bart R. Zeydel
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Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10050774
Patent Primary Examiner
Phuong Phu
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