US Patent 10056145 Resistive memory transition monitoring

A circuit for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines. The circuit includes a current determining circuit configured to determine a cell current and a cell current change rate of at least one of the cells; and a control circuit configured to: determine whether the cell current change rate is outside of a cell current change rate predefined range; and perform a predetermined action if the control circuit determination is positive.