Patent attributes
An arithmetic processing device includes arithmetic processing cores, and a control circuit that includes a request port accepting a request for a memory space; a processing circuit unit that executes processing of the request; a control pipeline that determines whether or not the processing is executable by the processing circuit unit on the request input through the request port, and that executes first abort processing for the request when the processing is not executable on the request, and issues the processing to the processing circuit unit when the processing is executable; and an identical-address request arbitration circuit that holds an occurrence order of requests with an identical address that is aborted due to the processing being not executable, and that executes second abort processing on those of requests input to the control pipeline which have the identical address and which are other than a leading request in the occurrence order.
