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US Patent 10096364 Three-dimensional vertical NOR flash thin-film transistor strings

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Date Filed
December 11, 2017
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Date of Patent
October 9, 2018
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Patent Application Number
15837734
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Patent Citations Received
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US Patent 12105650 Quasi-volatile system-level memory
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US Patent 11508445 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays
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US Patent 11508693 High capacity memory module including wafer-section memory circuit
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US Patent 11507301 Memory module implementing memory centric architecture
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US Patent 12068286 Device with embedded high-bandwidth, high-capacity memory using wafer bonding
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US Patent 12073082 High capacity memory circuit with low effective latency
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US Patent 11488676 Implementing logic function and generating analog signals using NOR memory strings
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US Patent 11515309 Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array
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US Patent 10608011 3-dimensional NOR memory array architecture and methods for fabrication thereof
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US Patent 10720448 Three-dimensional vertical NOR flash thin-film transistor strings
•••
Patent Inventor Names
Eli Harari
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10096364
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Patent Primary Examiner
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Harry W Byrne
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