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US Patent 10103165 Memory device
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Patent
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Date Filed
April 7, 2017
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Date of Patent
October 16, 2018
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Patent Application Number
15481609
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Patent Citations Received
US Patent 12089405 Three-dimensional memory devices with channel structures having plum blossom shape
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US Patent 11569262 Semiconductor device including vertical memory structure
US Patent 11282850 Semiconductor memory device having a charge accumulating layer including aluminum, oxygen, and nitrogen
US Patent 11716847 Three-dimensional NAND memory device with split gates
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US Patent 11784216 Manufacturing method of capacitive structure, and capacitor
US Patent 11869932 Manufacturing method of capacitive structure, and capacitor
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Patent Inventor Names
Jae Hoon Jang
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Dong Seog Eun
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Won Chul Jang
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Young Hwan Son
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10103165
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Patent Primary Examiner
Galina Yushina
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