US Patent 10103726 Radio frequency switches with reduced clock noise

A switch bias control circuit includes a level shifter and voltage regulator circuitry configured to receive a voltage reference signal, provide a first voltage output at a first node and provide a second voltage output at a second node, the first node and the second node being at least partially isolated from one another. coupling circuitry couples the first node to the level shifter and couples the second node to a negative voltage generator.