Patent attributes
Packaged semiconductor devices and packaging devices and methods are disclosed. In one embodiment, a method of packaging a semiconductor device includes providing a first integrated circuit die that is coupled to a first surface of a substrate that includes through-substrate vias (TSVs) disposed therein. A conductive ball is coupled to each of the TSVs on a second surface of the substrate that is opposite the first surface of the substrate. A second integrated circuit die is coupled to the second surface of the substrate, and a molding compound is formed over the conductive balls, the second integrated circuit die, and the second surface of the substrate. The molding compound is removed from over a top surface of the conductive balls, and the top surface of the conductive balls is recessed. A redistribution layer (RDL) is formed over the top surface of the conductive balls and the molding compound.
