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US Patent 10115770 Methods and apparatus for three-dimensional nonvolatile memory

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Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10115770
Patent Inventor Names
Jongsun Sel0
Tuan Pham0
Daewung Kang0
Yohei Yamada0
Michiaki Sano0
Mitsuteru Mushiga0
Date of Patent
October 30, 2018
Patent Application Number
15445734
Date Filed
February 28, 2017
Patent Citations Received
‌
US Patent 11978724 Diffused bitline replacement in memory
0
‌
US Patent 11621246 Diffused bitline replacement in stacked wafer memory
0
Patent Primary Examiner
‌
Savitr Mulpuri
Patent abstract

A method is provided that includes forming a dielectric material and a first sacrificial material above a substrate, forming a second sacrificial material above the substrate and disposed adjacent the dielectric material and the first sacrificial material, forming a first hole in the second sacrificial material, the first hole disposed in a first direction, forming a word line layer above the substrate via the first hole, the word line layer disposed in a second direction perpendicular to the first direction, forming a first portion of a nonvolatile memory material on peripheral sides of the word line layer via the first hole, forming a second hole in the second sacrificial material, forming a second portion of the nonvolatile memory material on a sidewall of the second hole, forming a local bit line in the second hole, and forming a memory cell including the nonvolatile memory material at an intersection of the local bit line and the word line layer.

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