US Patent 10134894 Dual gate FD-SOI transistor

Circuit module designs that incorporate dual gate field effect transistors are implemented with fully depleted silicon-on-insulator (FD-SOI) technology. Lowering the threshold voltages of the transistors can be accomplished through dynamic secondary gate control in which a back-biasing technique is used to operate the dual gate FD-SOI transistors with enhanced switching performance. Consequently, such transistors can operate at very low core voltage supply levels, down to as low as about 0.4 V, which allows the transistors to respond quickly and to switch at higher speeds. Performance improvements are shown in circuit simulations of an inverter, an amplifier, a level shifter, and a voltage detection circuit module.