US Patent 10140059 Semiconductor memory device and memory system

A memory system includes a semiconductor memory device including a plurality of memory cells, and a memory controller. The semiconductor memory device includes first, second, and third caches for storing data before the data are written into the memory cells. The memory controller is configured to issue commands to the semiconductor memory device, the commands including a first command issued with write data to store the write data in the first cache and a second command issued with write data to store the write data in the first cache and then transfer the write data in the first cache to one of the second and third caches.