US Patent 10152566 Constraint based bit-stream compression in hardware for programmable devices

A programmable logic device such as an integrated circuit may receive user-defined configuration data from a circuit design system. The user-defined configuration data may include a minimal number of user-defined configuration variables necessary to configure the programmable logic device when combined with hardware-defined configuration variables generated in resolution engines in the programmable logic device based on the user-defined configuration variables. The resolution engines may process multiple hardware-defined configuration variables simultaneously and in parallel. A temporary storage device in the programmable logic device may store the user-defined configuration variables, the hardware-defined configuration variables, and preloaded configuration data. The resolution engines may generate a configuration bitstream to configure a configuration random access memory on the device using the configuration data stored on the temporary storage.