Patent attributes
Systems and methods for providing a Barrier Modulated Cell (BMC) structure with reduced shifting in stored memory cell resistance levels over time are described. The BMC structure may comprise a reversible resistance-switching memory element within a memory array comprising a first conductive metal oxide (e.g., titanium oxide) in series with an alternating stack of one or more layers of an amorphous low bandgap material (e.g., germanium) with one or more layers of a second conductive metal oxide (e.g., aluminum oxide). The BMC structure may include a barrier layer comprising a first conductive metal oxide, such as titanium oxide or strontium titanate, in series with a germanium stack that includes a layer of amorphous germanium or amorphous silicon germanium paired with a second conductive metal oxide. The second conductive metal oxide (e.g., aluminum oxide) may be different from the first conductive metal oxide (e.g., titanium oxide).
