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US Patent 10157909 3D semiconductor device and structure
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Patent
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Date Filed
January 4, 2018
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Date of Patent
December 18, 2018
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Patent Application Number
15862616
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Patent Citations Received
US Patent 11443971 3D semiconductor device and structure with memory
US Patent 11296083 Three-dimensional (3D), vertically-integrated field-effect transistors (FETs) electrically coupled by integrated vertical FET-to-FET interconnects for complementary metal-oxide semiconductor (CMOS) cell circuits
US Patent 11342381 Resistive random-access memory device
Patent Inventor Names
Brian Cronquist
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Zvi Or-Bach
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Deepak C. Sekar
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10157909
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Patent Primary Examiner
Joseph Schoenholtz
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