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US Patent 10163701 Multi-stack package-on-package structures
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Patent
Date Filed
October 30, 2017
Date of Patent
December 25, 2018
Patent Applicant
Taiwan Semiconductor Manufacturing Company
Patent Application Number
15797453
Patent Citations Received
US Patent 11469215 Chip package structure with molding layer and method for forming the same
US Patent 10636757 Integrated circuit component package and method of fabricating the same
US Patent 11600590 Semiconductor device and semiconductor package
US Patent 11756931 Chip package structure with molding layer
Patent Inventor Names
Li-Hsien Huang
0
Tien-Chung Yang
0
Wei-Yu Chen
0
An-Jhih Su
0
Chi-Jung Lee
0
Hsien-Wei Chen
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
10163701
Patent Primary Examiner
Tu-Tu V Ho
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