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US Patent 10163981 Metal landing method for RRAM technology

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
February 24, 2017
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Date of Patent
December 25, 2018
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Patent Application Number
15442174
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Patent Citations Received
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US Patent 11678592 Step height mitigation in resistive random access memory structures
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US Patent 11538524 Silicon over insulator two-transistor two-resistor in-series resistive memory cell
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US Patent 11038108 Step height mitigation in resistive random access memory structures
Patent Inventor Names
Yu-Wen Liao
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Jen-Sheng Yang
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Kuo-Chi Tu
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Wen-Ting Chu
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Chih-Yang Chang
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Chin-Chieh Yang
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Hsia-Wei Chen
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10163981
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Patent Primary Examiner
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Galina Yushina
0

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