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US Patent 10180820 Multiply-accumulate circuits
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Patent
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Date Filed
September 30, 2016
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Date of Patent
January 15, 2019
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Patent Applicant
Hewlett Packard Enterprise
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Patent Application Number
15282021
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Patent Citations Received
US Patent 12061542 Memory device with latch-based neural network weight parity detection and trimming
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US Patent 11074073 Apparatus and method for multiply, add/subtract, and accumulate of packed data elements
US Patent 11256504 Apparatus and method for complex by complex conjugate multiplication
US Patent 11755323 Apparatus and method for complex by complex conjugate multiplication
US Patent 12001693 Data storage device with noise injection
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US Patent 10318242 Memristor-based multipliers using memristors-as-drivers (MAD) gates
US Patent 10305484 Memristor-based dividers using memristors-as-drivers (MAD) gates
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US Patent 10447271 Memristor-based dividers using memristors-as-drivers (MAD) gates
US Patent 10514924 Apparatus and method for performing dual signed and unsigned multiplication of packed data elements
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US Patent 10552154 Apparatus and method for multiplication and accumulation of complex and real packed data elements
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•••
Patent Inventor Names
John Paul Strachan
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Le Zheng
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Brent Buchanan
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10180820
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Patent Primary Examiner
Micahel D. Yaary
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