Patent attributes
A reception circuit includes a determination circuit including comparator circuits configured to determinate a level of a received signal and a logic circuit configured to generate a digital signal based on outputs of the comparator circuits. The determination circuit is configured to determinate by a first number of the comparator circuits when the received signal is a first signal which is a multi-valued signal and determinate by a second number of the comparator circuits, the second number being smaller than the first number, when the received signal is a second signal. The logic circuit is configured to operate as a decoder which decodes outputs of the comparator circuits and generates the digital signal when the received signal is the first signal, and operates as a selector which selects an output of the comparator circuit for generating the digital signal when the received signal is the second signal.
