US Patent 10204829 Low-resistivity metallic interconnect structures with self-forming diffusion barrier layers

Methods for fabricating low-resistivity metallic interconnect structures with self-forming diffusion barrier layers are provided, as well as semiconductor devices comprising low-resistivity metallic interconnect structures with self-formed diffusion barrier layers. For example, a semiconductor device includes a dielectric layer disposed on a substrate, an opening etched in the dielectric layer, a metallic liner layer covering sidewall and bottom surfaces of the opening in the dielectric layer, copper material filling the opening to form an interconnect structure, and a self-formed diffusion barrier layer formed in the sidewall surfaces of the opening of the dielectric layer. The self-formed diffusion barrier layer includes manganese atoms which are diffused into the sidewall surfaces of the dielectric layer.