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US Patent 10230396 Method and apparatus for layer-specific LDPC decoding

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
September 25, 2017
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Date of Patent
March 12, 2019
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Patent Applicant
Microsemi
Microsemi
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Patent Application Number
15715011
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Patent Citations Received
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US Patent 11962324 Threshold-based min-sum algorithm to lower the error floors of quantized low-density parity-check decoders
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US Patent 11514994 Method and apparatus for outlier management
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US Patent 11782871 Method and apparatus for desynchronizing execution in a vector processor
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US Patent 11398291 Method and apparatus for determining when actual wear of a flash memory device differs from reliability states for the flash memory device
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US Patent 11436258 Prometheus: processing-in-memory heterogenous architecture design from a multi-layer network theoretic strategy
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US Patent 11451243 Method and apparatus for decoding data in communication or broadcasting system
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US Patent 11843393 Method and apparatus for decoding with trapped-block management
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US Patent 11934696 Machine learning assisted quality of service (QoS) for solid state drives
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US Patent 11514992 Method and apparatus for reading a flash memory device
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US Patent 11563450 System and method for high reliability fast RAID decoding for NAND flash memories
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•••
Patent Inventor Names
Rino Micheloni
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Alessia Marelli
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Christopher I. W. Norrie
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Peter Z. Onufryk
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10230396
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Patent Primary Examiner
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Mujtaba M Chaudry
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