Patent attributes
A pulse width filtering circuit for filtering pulse signals includes an input transition detection circuit detecting change of state of an input signal, including a first transition from a low signal to a high signal and a second transition from the high signal to the low signal; a first delay circuit determining whether the high signal from the first transition is maintained longer than a first period and, if so, generating a first output indicative of the first transition, after the first period; a second delay circuit determining whether the low signal from the second transition is maintained for longer than a second period and, if so, generating a second output indicative of the second transition, after the second period; and a switching circuit connected to the first and second delay circuits and selectively outputting the first output and the second output, based on the state of the input signal.