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US Patent 10254968 Hybrid memory device for lookup operations

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
May 10, 2016
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Date of Patent
April 9, 2019
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Patent Application Number
15151040
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Patent Citations Received
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US Patent 11515309 Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array
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US Patent 12105650 Quasi-volatile system-level memory
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US Patent 11508445 Capacitive-coupled non-volatile thin-film transistor strings in three dimensional arrays
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US Patent 11508693 High capacity memory module including wafer-section memory circuit
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US Patent 11507301 Memory module implementing memory centric architecture
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US Patent 11937424 Thin-film storage transistors in a 3-dimensional array of nor memory strings and process for fabricating the same
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US Patent 12002523 Memory circuit, system and method for rapid retrieval of data sets
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US Patent 12068286 Device with embedded high-bandwidth, high-capacity memory using wafer bonding
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US Patent 12073082 High capacity memory circuit with low effective latency
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US Patent 11488676 Implementing logic function and generating analog signals using NOR memory strings
•••
Patent Inventor Names
Hillel Gazit
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Sohail Syed
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Gevorg Torjyan
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10254968
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Patent Primary Examiner
Charles Rones
Charles Rones
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