Patent attributes
A scanline driver chip includes: a chip selection de-serializer configured to provide an output enable signal based on an enable signal, a clock signal, and serial chip selection data, the serial chip selection data being received in serial order; an address data de-serializer configured to provide parallel address data based on the enable signal, the clock signal, the output enable signal, and serial address data, the serial address data being received in serial order; and a decoder-level shifter configured to provide a scanline enable signal based on the parallel address data. A display device includes: a controller configured to provide an enable signal, a clock signal, serial chip selection data, and serial address data; a plurality of the scanline driver chips each configured to provide a scanline enable signal; and a pixel array configured to be driven based on the scanline enable signal.