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US Patent 10270453 Coarse delay lock estimation for digital DLL circuits

Patent 10270453 was granted and assigned to Intel on April, 2019 by the United States Patent and Trademark Office.

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Patent Citations Received
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US Patent 11996149 Access command delay using delay locked loop (DLL) circuitry
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US Patent 11876521 Dynamically updated delay line
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Patent abstract

Digital delay locked loop circuits, devices systems, and associated methods are provided and described. Such devices, systems, and methods utilize an open loop measurement for establishing a coarse delay lock.

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US Patent 11705429 Redundant through-silicon vias
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https://pdfpiw.uspto.gov/.piw?Docid=1027045300
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Patent citations received
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US Patent 11380395 Access command delay using delay locked loop (DLL) circuitry
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US Patent 11018676 Coarse delay lock estimation for digital DLL circuits
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US Patent 10938395 Electronic device with a timing adjustment mechanism
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US Patent 10623004 Electronic device with a timing adjustment mechanism
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US Patent 10454484 Electronic device with a timing adjustment mechanism

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