Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Paul Kimelman0
Date of Patent
April 30, 2019
0Patent Application Number
157951250
Date Filed
October 26, 2017
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A delay circuit, including a connector pad to receive a data input, a pad pin to receive a clock input having a clock edge, a first data line to receive the data input, a second data line to receive the data input, the second data line including a delay circuit that outputs a delayed data output, and at least one logic gate to accept the data input and delayed data output and output a logic state, wherein the logic state determines whether there is a glitch in the delayed data output, and wherein the delay circuit includes at least one delay element to register an output of the at least one logic gate at the clock edge to recognize the glitch.
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