US Patent 10290722 Memory device and method of fabricating thereof

A memory device includes a semiconductor substrate having a cell region and a peripheral region surrounding the cell region and a pair of control gate stacks on the cell region. Each of the control gate stacks includes a storage layer and a control gate on the storage layer. The memory device includes at least one high-κ metal gate stack disposed on the substrate. The high-κ metal gate stack has a metal gate and a high-κ dielectric film wrapping around the metal gate, and a top surface of the control gate is lower than a top surface of the metal gate.