Patent attributes
A segmented digital-to-analog converter (DAC) circuit includes an interpolation resistor DAC (RDAC) and a buffer amplifier. The interpolation RDAC includes a resistor-two-resistor (R-2R) DAC and a resistor ladder. The R-2R DAC is configured to receive a first subword and generate an analog output signal with a voltage representative of the first subword. The first subword has an integer number M bits that include a most significant bit (MSB) of a digital input signal. The resistor ladder is configured to receive the analog output signal and a second subword and generate an analog interpolated signal. The second subword has an integer number I bits that include an intermediate significant bit (ISB) of the digital input signal The buffer amplifier is configured to receive the analog interpolated signal and generate an output signal for the segmented DAC.