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US Patent 10313099 Multi-lane coherent transceiver with synchronized lane reset signals
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Patent
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Date Filed
June 4, 2018
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Date of Patent
June 4, 2019
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Patent Application Number
15997361
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Patent Citations Received
US Patent 12113538 Error detection and compensation for a multiplexing transmitter
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US Patent 10469242 Mulit-lane synchronous reset for coherent receivers
US Patent 10936774 Methods for identifying integrated circuit failures caused by reset-domain interactions
US Patent 11314107 Optical modulation skew adjustment systems and methods
US Patent 11329669 Multi-lane serializer device
US Patent 11777702 Closed loop lane synchronization for optical modulation
Patent Inventor Names
Hiva Hedayati
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Li Li
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10313099
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Patent Primary Examiner
Michael R Neff
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