US Patent 10332923 Control circuitry for 1D optical metasurfaces

A hologram system may include a hologram chip comprising a wafer substrate having a first plurality of conductive pads on a hologram surface region connected to a second plurality of conductive pads on an interconnect surface region. The hologram chip may also include an array of sub-wavelength hologram elements integrated with a refractive index tunable core material on the hologram region of the wafer substrate. The hologram system may also include a control circuit chip having a third plurality of conductive pads connected to the second plurality of conductive pads on the interconnect region of the wafer substrate. The interconnect region is on the same side of the wafer substrate as the hologram region. The first plurality of conductive pads is directly connected to the array of sub-wavelength hologram elements.