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US Patent 10368072 Advanced arithmetic coder

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
May 26, 2016
Date of Patent
July 30, 2019
Patent Application Number
15166068
Patent Citations Received
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US Patent 12120300 Restriction on number of context coded bins
0
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US Patent 11490109 Interaction between LUT and AMVP
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US Patent 11496763 Partial/full pruning when adding a HMVP candidate to merge/AMVP
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US Patent 11997253 Conditions for starting checking HMVP candidates depend on total number minus K
0
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US Patent 11463685 LUTS with intra prediction modes and intra mode prediction from non-adjacent blocks
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US Patent 11528500 Partial/full pruning when adding a HMVP candidate to merge/AMVP
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US Patent 11528501 Interaction between LUT and AMVP
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US Patent 11245892 Checking order of motion candidates in LUT
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US Patent 11582451 Coefficient scaling for high precision image and video coding
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US Patent 11589071 Invoke of LUT updating
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10368072
Patent Primary Examiner
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Dave Czekaj

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