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US Patent 10381095 Non-volatile memory with smart erase verify

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
February 28, 2018
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Date of Patent
August 13, 2019
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Patent Application Number
15907570
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Patent Citations Received
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US Patent 12094546 Non-volatile memory with zone based program speed adjustment
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US Patent 11495311 Non-volatile memory with erase verify skip
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US Patent 11049578 Non-volatile memory with program verify skip
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US Patent 11309031 Periodic reduced word line bias which increases channel boosting
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US Patent 11967383 Non-volatile memory with enhanced program operation for last state on slow plane
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US Patent 12087373 Non-volatile memory with optimized erase verify sequence
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US Patent 11474890 Memory system and method of operating memory system
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US Patent 11532370 Non-volatile memory with fast multi-level program verify
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US Patent 11587629 Detecting latent defects in a memory device during an erase operation based on physical and logical segment fail bits
Patent Inventor Names
Hideto Tomiie
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Kei Date
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10381095
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Patent Primary Examiner
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Fernando Hidalgo
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