US Patent 10387053 Memory synchronization in a distributed computing system

Regions of memory in a distributed computing system may be synchronized. A first computing node may comprise a processor writing to a memory via a memory controller. A request to write data to the memory may be received by the memory controller. The memory controller may send a signal to a logic device which forwards the signal to other computing nodes in the distributed system. The memory controller may detect and respond to conflicting writes by instructing the computing nodes to overwrite conflicting memory regions with a data pattern indicative of the conflict.