US Patent 10402219 Managing shared services in reconfigurable FPGA regions

An information handling system may include a field-programmable gate array (FPGA) and an FPGA service manager, within a hypervisor, to receive from software running in a virtual machine a request for an FPGA service, load a bitstream for the service into a first region of the FPGA, increment a count of concurrent users of the bitstream, determine, subsequent to a further update to the count, whether the count is zero or non-zero, and reclaim the first region of the FPGA if the count is zero. The bitstream may be received from the virtual machine or from a catalog of bitstreams maintained on the hypervisor. The FPGA service manager may load a second instance of the bitstream into a second region of the FPGA dependent on execution constraints specified in a bitstream header, or may load a bitstream for a second service into the second region of the FPGA.