US Patent 10403358 Semiconductor memory device

According to one embodiment, a semiconductor memory device includes a nonvolatile memory comprising a plurality of memory cells, and a controller configured to perform, a preliminary write process of writing reverse data into a first memory cell, and a main write process of writing correct data in the first memory cell, when the first memory cell is in a weak bit state, wherein a condition of the preliminary write process is different from a condition of the main write process.