Is a
Patent attributes
Patent Jurisdiction
Patent Number
Date of Patent
September 24, 2019
Patent Application Number
16182521
Date Filed
November 6, 2018
Patent Citations Received
Patent Primary Examiner
Patent abstract
A low dropout (LDO) regulator includes an NMOS transistor, a resistor ladder, an error amplifier and a gate boosting circuit. The NMOS transistor is configured for receiving an input voltage to generate an output voltage. The resistor ladder, coupled to the NMOS transistor, is configured for generating a feedback signal according to a level of the output voltage. The error amplifier, coupled to the resistor ladder, is configured for receiving the feedback signal from the resistor ladder to generate a control signal. The gate boosting circuit, coupled between the NMOS transistor and the error amplifier, is configured for boosting the control signal to control the NMOS transistor, so as to pull the output voltage to a target level.
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