Patent attributes
The disclosure relates to an error amplification apparatus and a driving circuit including the error amplification apparatus. In the error amplification apparatus according to the disclosure, a pulse generating circuit generates a first pulse and a second pulse in accordance with an output voltage of an error amplification unit, a counting unit being coupled to the pulse generating circuit counts the first pulse and the second pulse, and generates a loop control signal representing a compensation voltage based on the count. The disclosure utilizes the counting unit to digitize the compensation voltage, and the counter value can reflect the compensation voltage, so that the variation of the loop control signal in the AC cycle of 50 Hz or 60 Hz is controlled to be little, thereby filtering out the ripple of AC of 50 Hz or 60 Hz. In this manner, the capacitance of the compensation capacitor is reduced so that the compensation capacitor can be integrated inside the IC chip, thereby simplifying the peripheral design, and eliminating the influence on the loop by the electrical leakage current due to moisture.
