US Patent 10431498 Semiconductor devices and fabrication methods thereof

A method for fabricating a semiconductor structure includes forming a plurality of gate structures on the base substrate with each gate structure including a gate electrode and sidewall spacers on each aide surface of the gate electrode, forming source/drain doped regions in the base substrate on opposite sides of each gate structure, forming a sacrificial layer on side surfaces of each sidewall spacer, and performing a pre-amorphous ion implantation process on the source/drain doped regions using the sacrificial layer as a mask.