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US Patent 10438645 Memory cell and methods thereof

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
October 27, 2017
Date of Patent
October 8, 2019
Patent Application Number
15796154
Patent Citations Received
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US Patent 12073082 High capacity memory circuit with low effective latency
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US Patent 11282848 Three-dimensional memory device including ferroelectric-metal-insulator memory cells and methods of making the same
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US Patent 11289602 FeFET of 3D structure for capacitance matching
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US Patent 11302716 Three-dimensional memory device including ferroelectric-metal-insulator memory cells and methods of making the same
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US Patent 12002523 Memory circuit, system and method for rapid retrieval of data sets
0
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US Patent 12075625 Memory cell, capacitive memory structure, and methods thereof
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US Patent 11839086 3-dimensional memory string array of thin-film ferroelectric transistors
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US Patent 11387254 Memory cell and methods thereof
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US Patent 11844204 Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array
0
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US Patent 11915768 Memory circuit, system and method for rapid retrieval of data sets
0
•••
Patent Inventor Names
Marko Noack
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Johannes Ocker
0
Rolf Jähne
0
Stefan Ferdinand Müller
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10438645
Patent Primary Examiner
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Jason Lappas

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