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US Patent 10439732 Receiving device and phase-error compensation method

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Patent
Patent
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Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
104397320
Patent Inventor Names
Takeshi Hoshida0
Hisao Nakashima0
Tomofumi Oyama0
Date of Patent
October 8, 2019
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Patent Application Number
156852050
Date Filed
August 24, 2017
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Patent Citations Received
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US Patent 11451367 Techniques for enhanced clock recovery
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US Patent 12113888 Frame synchronization system, frame synchronization circuit, and frame synchronization method
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Patent Primary Examiner
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LiHong Yu
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Patent abstract

A receiving device receives a received signal in which a data signal, modulated by using a phase modulation method, and a pilot signal are time-multiplexed. The receiving device includes a synchronizing circuit that synchronizes the phase of the received signal. The synchronizing circuit extracts a pilot signal from the received signal. The synchronizing circuit estimates a phase error by comparing the extracted pilot signal and a predetermined pattern. The synchronizing circuit conducts phase rotation on constellation points of the received signal in accordance with the reference phase, obtained from the phase error, and the phase in the modulation method related to the received signal. The synchronizing circuit estimates a phase estimate value of the received signal in accordance with the constellation points, on which phase rotation has been conducted. The synchronizing circuit compensates for a phase error of the received signal in accordance with the phase estimate value.

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