Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Ramin Farjadrad0
Date of Patent
October 15, 2019
0Patent Application Number
154780460
Date Filed
April 3, 2017
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A Serializer/Deserializer (SERDES) circuit is disclosed. The circuit includes an input/output (I/O) pad for coupling to a duplex SerDes link. An adjustable delay line provides a first component of a relative phase between a receive signal sampling point and a transmit echo signal. A second delay circuit generates a second component of the relative phase. A timing relationship between the receive signal sampling point and the transmit echo signal is based on the sum of the first and second components.
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